ESPHome  2024.9.0
Variables
WeiKai Global Registers

Definition of the WeiKai registers. More...

Variables

constexpr uint8_t esphome::weikai::WKREG_GENA = 0x00
 Global Control Register - 00 0000. More...
 
constexpr uint8_t esphome::weikai::GENA_C4EN = 1 << 3
 Channel 4 enable clock (0: disable, 1: enable) More...
 
constexpr uint8_t esphome::weikai::GENA_C3EN = 1 << 2
 Channel 3 enable clock (0: disable, 1: enable) More...
 
constexpr uint8_t esphome::weikai::GENA_C2EN = 1 << 1
 Channel 2 enable clock (0: disable, 1: enable) More...
 
constexpr uint8_t esphome::weikai::GENA_C1EN = 1 << 0
 Channel 1 enable clock (0: disable, 1: enable) More...
 
constexpr uint8_t esphome::weikai::WKREG_GRST = 0x01
 Global Reset Register - 00 0001. More...
 
constexpr uint8_t esphome::weikai::GRST_C4RST = 1 << 3
 Channel 4 soft reset (0: not reset, 1: reset) More...
 
constexpr uint8_t esphome::weikai::GRST_C3RST = 1 << 2
 Channel 3 soft reset (0: not reset, 1: reset) More...
 
constexpr uint8_t esphome::weikai::GRST_C2RST = 1 << 1
 Channel 2 soft reset (0: not reset, 1: reset) More...
 
constexpr uint8_t esphome::weikai::GRST_C1RST = 1 << 0
 Channel 1 soft reset (0: not reset, 1: reset) More...
 
constexpr uint8_t esphome::weikai::WKREG_GMUT = 0x02
 Global Master channel control register (not used) - 000010. More...
 
constexpr uint8_t esphome::weikai::WKREG_GIER = 0x10
 Global interrupt register (not used) - 01 0000. More...
 
constexpr uint8_t esphome::weikai::WKREG_GIFR = 0x11
 Global interrupt flag register (not used) 01 0001. More...
 
constexpr uint8_t esphome::weikai::WKREG_GPDIR = 0x21
 Global GPIO direction register - 10 0001. More...
 
constexpr uint8_t esphome::weikai::WKREG_GPDAT = 0x31
 Global GPIO data register - 11 0001. More...
 

Detailed Description

Definition of the WeiKai registers.

This section groups all Global Registers: these registers are global to the the WeiKai chip (i.e. independent of the UART channel used)

Note
only registers and parameters used have been fully documented

Variable Documentation

◆ GENA_C1EN

constexpr uint8_t esphome::weikai::GENA_C1EN = 1 << 0

Channel 1 enable clock (0: disable, 1: enable)

Definition at line 40 of file wk_reg_def.h.

◆ GENA_C2EN

constexpr uint8_t esphome::weikai::GENA_C2EN = 1 << 1

Channel 2 enable clock (0: disable, 1: enable)

Definition at line 38 of file wk_reg_def.h.

◆ GENA_C3EN

constexpr uint8_t esphome::weikai::GENA_C3EN = 1 << 2

Channel 3 enable clock (0: disable, 1: enable)

Definition at line 36 of file wk_reg_def.h.

◆ GENA_C4EN

constexpr uint8_t esphome::weikai::GENA_C4EN = 1 << 3

Channel 4 enable clock (0: disable, 1: enable)

Definition at line 34 of file wk_reg_def.h.

◆ GRST_C1RST

constexpr uint8_t esphome::weikai::GRST_C1RST = 1 << 0

Channel 1 soft reset (0: not reset, 1: reset)

Definition at line 62 of file wk_reg_def.h.

◆ GRST_C2RST

constexpr uint8_t esphome::weikai::GRST_C2RST = 1 << 1

Channel 2 soft reset (0: not reset, 1: reset)

Definition at line 60 of file wk_reg_def.h.

◆ GRST_C3RST

constexpr uint8_t esphome::weikai::GRST_C3RST = 1 << 2

Channel 3 soft reset (0: not reset, 1: reset)

Definition at line 58 of file wk_reg_def.h.

◆ GRST_C4RST

constexpr uint8_t esphome::weikai::GRST_C4RST = 1 << 3

Channel 4 soft reset (0: not reset, 1: reset)

Definition at line 56 of file wk_reg_def.h.

◆ WKREG_GENA

constexpr uint8_t esphome::weikai::WKREG_GENA = 0x00

Global Control Register - 00 0000.

-------------------------------------------------------------------------
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | bit
-------------------------------------------------------------------------
| M0 | M1 | RSV | C4EN | C3EN | C2EN | C1EN | name
-------------------------------------------------------------------------
| R | R | R | R | W/R | W/R | W/R | W/R | type
-------------------------------------------------------------------------
| 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | reset
-------------------------------------------------------------------------

Definition at line 32 of file wk_reg_def.h.

◆ WKREG_GIER

constexpr uint8_t esphome::weikai::WKREG_GIER = 0x10

Global interrupt register (not used) - 01 0000.

Definition at line 68 of file wk_reg_def.h.

◆ WKREG_GIFR

constexpr uint8_t esphome::weikai::WKREG_GIFR = 0x11

Global interrupt flag register (not used) 01 0001.

Definition at line 71 of file wk_reg_def.h.

◆ WKREG_GMUT

constexpr uint8_t esphome::weikai::WKREG_GMUT = 0x02

Global Master channel control register (not used) - 000010.

Definition at line 65 of file wk_reg_def.h.

◆ WKREG_GPDAT

constexpr uint8_t esphome::weikai::WKREG_GPDAT = 0x31

Global GPIO data register - 11 0001.

-------------------------------------------------------------------------
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | bit
-------------------------------------------------------------------------
| PV7 | PV6 | PV5 | PV4 | PV3 | PV2 | PV1 | PV0 | name
-------------------------------------------------------------------------
| W/R | W/R | W/R | W/R | W/R | W/R | W/R | W/R | type
-------------------------------------------------------------------------
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | reset
-------------------------------------------------------------------------

Definition at line 99 of file wk_reg_def.h.

◆ WKREG_GPDIR

constexpr uint8_t esphome::weikai::WKREG_GPDIR = 0x21

Global GPIO direction register - 10 0001.

-------------------------------------------------------------------------
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | bit
-------------------------------------------------------------------------
| PD7 | PD6 | PD5 | PD4 | PD3 | PD2 | PD1 | PD0 | name
-------------------------------------------------------------------------
| W/R | W/R | W/R | W/R | W/R | W/R | W/R | W/R | type
-------------------------------------------------------------------------
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | reset
-------------------------------------------------------------------------

Definition at line 85 of file wk_reg_def.h.

◆ WKREG_GRST

constexpr uint8_t esphome::weikai::WKREG_GRST = 0x01

Global Reset Register - 00 0001.

-------------------------------------------------------------------------
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | bit
-------------------------------------------------------------------------
| C4SLEEP| C3SLEEP| C2SLEEP| C1SLEEP| C4RST | C3RST | C2RST | C1RST | name
-------------------------------------------------------------------------
| R | R | R | R | W1/R0 | W1/R0 | W1/R0 | W1/R0 | type
-------------------------------------------------------------------------
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | reset
-------------------------------------------------------------------------

Definition at line 54 of file wk_reg_def.h.

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